|
23.12. - 23.12.2026 09:00-17:00
|
Designing with the Versal Adaptive SoC: Network on Chip
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
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21.12. - 22.12.2026 09:00-17:00
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Developing AI Inference Solutions with the Vitis AI Platform
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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16.12. - 17.12.2026 09:00-17:00
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Designing with the Versal Adaptive SoC: Architecture
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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14.12. - 18.12.2026 09:00-17:00
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Design Compendium with High Level Synthesis for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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14.12. - 15.12.2026 09:00-17:00
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Designing with Versal AI Engine: Kernel Programming and Optimization - 3
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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09.12. - 10.12.2026 09:00-17:00
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Designing with Versal AI Engine: Graph Programming with AI Engine Kernels - 2
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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02.12. - 03.12.2026 09:00-17:00
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Designing with Versal AI Engine: Architecture and Design Flow - 1
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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26.11. - 27.11.2026 09:00-17:00
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Designing with Ethernet MAC Controllers
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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24.11. - 25.11.2026 09:00-17:00
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Designing with Xilinx Serial Transceivers
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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23.11. - 27.11.2026 09:00-17:00
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Design Compendium with Verilog for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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|
23.11. - 23.11.2026 09:00-17:00
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Designing with the Versal Adaptive SoC: Serial Transceivers
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
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18.11. - 19.11.2026 09:00-17:00
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Vitis Model Composer: A MATLAB and Simulink-based Product
|
Xilinx
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Virtual Learning Environment (Online)
|
€ 1,700.00
|
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16.11. - 20.11.2026 09:00-17:00
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Design Compendium with High Level Synthesis for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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|
16.11. - 17.11.2026 09:00-17:00
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Designing with SystemVerilog
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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11.11. - 12.11.2026 09:00-17:00
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Embedded Design with PetaLinux Tools
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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09.11. - 10.11.2026 09:00-17:00
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Designing with the Zynq UltraScale+ RFSoC
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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09.11. - 13.11.2026 09:00-17:00
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Design Compendium Embedded System for AMD XIlinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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|
04.11. - 05.11.2026 09:00-17:00
|
Operating Systems and Hypervisors in Adaptive SoCs
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
02.11. - 06.11.2026 09:00-17:00
|
Design Compendium Yocto for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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|
02.11. - 03.11.2026 09:00-17:00
|
Embedded Heterogeneous Design
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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29.10. - 30.10.2026 09:00-17:00
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Designing with SystemVerilog
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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26.10. - 28.10.2026 09:00-17:00
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Designing with Verilog
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 2,550.00
|
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21.10. - 22.10.2026 09:00-17:00
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High-Level Synthesis with the Vitis Unified IDE (HLS)
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
19.10. - 23.10.2026 09:00-17:00
|
Design Compendium Verification with VHDL for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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|
15.10. - 16.10.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 4
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
13.10. - 14.10.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 3
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
12.10. - 16.10.2026 09:00-17:00
|
Design Compendium with Verilog for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
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|
12.10. - 13.10.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 2
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
08.10. - 09.10.2026 09:00-17:00
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Designing FPGAs Using the Vivado Design Suite 1
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
07.10. - 09.10.2026 09:00-17:00
|
Design Compendium with VHDL for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 2,550.00
|
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|
05.10. - 06.10.2026 09:00-17:00
|
Designing an Integrated PCI Express System
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
30.09. - 01.10.2026 09:00-17:00
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Designing with the Versal Adaptive SoC: Hardware Debug
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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28.09. - 29.09.2026 09:00-17:00
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Designing with the Versal Adaptive SoC: Hardware Debug
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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23.09. - 24.09.2026 09:00-17:00
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Designing with the Versal Adaptive SoC: Memory Interfaces
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
22.09. - 22.09.2026 09:00-17:00
|
Designing with the Versal Adaptive SoC: Network on Chip
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
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|
|
21.09. - 23.09.2026 09:00-17:00
|
Design Compendium with VHDL for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
16.09. - 17.09.2026 09:00-17:00
|
Designing with the Versal Adaptive SoC: Architecture
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
14.09. - 15.09.2026 09:00-17:00
|
x86 Foundation
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 0.00
|
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|
14.09. - 18.09.2026 09:00-17:00
|
Design Compendium with High Level Synthesis for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
07.09. - 08.09.2026 09:00-17:00
|
Designing with Versal AI Engine: Kernel Programming and Optimization - 3
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
07.09. - 11.09.2026 09:00-17:00
|
Design Compendium Verification with VHDL for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
02.09. - 03.09.2026 09:00-17:00
|
Designing with Versal AI Engine: Graph Programming with AI Engine Kernels - 2
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
|
31.08. - 01.09.2026 09:00-17:00
|
Designing with Versal AI Engine: Architecture and Design Flow - 1
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
31.08. - 04.09.2026 09:00-17:00
|
Design Compendium Yocto for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
27.08. - 28.08.2026 09:00-17:00
|
Designing with Ethernet MAC Controllers
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
26.08. - 26.08.2026 09:00-17:00
|
Designing with the Versal Adaptive SoC: Serial Transceivers
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
Add to cart
|
|
24.08. - 28.08.2026 09:00-17:00
|
Design Compendium with Verilog for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
24.08. - 25.08.2026 09:00-17:00
|
Designing with Xilinx Serial Transceivers
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
|
20.08. - 21.08.2026 09:00-17:00
|
DFX - Designing with Dynamic Function eXchange Using the Vivado Design Suite
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
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|
|
19.08. - 21.08.2026 09:00-17:00
|
Design Compendium with VHDL for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 2,550.00
|
Add to cart
|
|
17.08. - 18.08.2026 09:00-17:00
|
Embedded Design with PetaLinux Tools
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
13.08. - 14.08.2026 09:00-17:00
|
Designing with the Versal Adaptive SoC: PCI Express Systems
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
11.08. - 12.08.2026 09:00-17:00
|
Designing with the Zynq UltraScale+ RFSoC
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
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|
10.08. - 10.08.2026 09:00-17:00
|
UltraScale+ Spartan Compendium Live
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 0.00
|
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|
10.08. - 14.08.2026 09:00-17:00
|
Design Compendium Embedded System for AMD XIlinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
06.08. - 07.08.2026 09:00-17:00
|
Operating Systems and Hypervisors in Adaptive SoCs
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
04.08. - 05.08.2026 09:00-17:00
|
Embedded Heterogeneous Design
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
03.08. - 07.08.2026 09:00-17:00
|
Design Compendium with High Level Synthesis for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
03.08. - 03.08.2026 09:00-17:00
|
PCIe Protocol
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
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|
|
30.07. - 31.07.2026 09:00-17:00
|
Verification with SystemVerilog
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
27.07. - 31.07.2026 09:00-17:00
|
Design Compendium Yocto for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
27.07. - 29.07.2026 09:00-17:00
|
Designing with Verilog
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 2,550.00
|
Add to cart
|
|
23.07. - 24.07.2026 09:00-17:00
|
Designing with SystemVerilog
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
21.07. - 22.07.2026 09:00-17:00
|
High-Level Synthesis with the Vitis Unified IDE (HLS)
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
20.07. - 24.07.2026 09:00-17:00
|
Design Compendium Verification with VHDL for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
20.07. - 21.07.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 4
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
17.07. - 17.07.2026 09:00-17:00
|
PCIe Protocol
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
Add to cart
|
|
15.07. - 16.07.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 3
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
|
14.07. - 17.07.2026 09:00-17:00
|
Design Compendium Yocto for AMD Xilinx devices
|
so-logic
|
Virtual Learning Environment (Online)
|
€ 4,250.00
|
Add to cart
|
|
13.07. - 14.07.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 2
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 850.00
|
Add to cart
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|
09.07. - 10.07.2026 09:00-17:00
|
Designing FPGAs Using the Vivado Design Suite 1
|
Xilinx
|
Virtual Learning Environment (Online)
|
€ 1,700.00
|
Add to cart
|
