Training schedules 2024-12-18 - 2025-12-18
Event period | Training | Partner | Location | Price | |
---|---|---|---|---|---|
20.12. - 20.12.2024 09:00-17:00 | Designing with the Versal Adaptive SoC: Network on Chip | Xilinx | so-logic (top1) (Austria) | € 800.00 | |
01.01. - 01.01.2025 09:00-17:00 | Adaptive SoCs for System Architects | Xilinx | Virtual Learning Environment (Online) | € 1,600.00 | |
07.01. - 09.01.2025 09:00-17:00 | Designing with VHDL | Xilinx | Virtual Learning Environment (Online) | € 2,550.00 | |
07.01. - 08.01.2025 09:00-17:00 | Designing FPGAs Using the Vivado Design Suite 1 | Xilinx | Virtual Learning Environment (Online) | € 1,700.00 | |
09.01. - 10.01.2025 09:00-17:00 | Designing FPGAs Using the Vivado Design Suite 2 | Xilinx | Virtual Learning Environment (Online) | € 1,700.00 | |
13.01. - 14.01.2025 09:00-17:00 | Designing FPGAs Using the Vivado Design Suite 3 | Xilinx | Virtual Learning Environment (Online) | € 0.00 | |
15.01. - 16.01.2025 09:00-17:00 | Designing FPGAs Using the Vivado Design Suite 4 | Xilinx | Virtual Learning Environment (Online) | € 1,700.00 | |
10.02. - 10.02.2025 09:00-16:00 | C++ for Adaptive SOC | Xilinx | so-logic (top1) (Austria) | € 0.00 | |
15.04. - 17.04.2025 09:00-17:00 | Designing with VHDL | Xilinx | Virtual Learning Environment (Online) | € 2,250.00 |