Designing FPGAs Using the Vivado Design Suite 2

Learn how to build a more effective FPGA design: The focus is on: Using synchronous design techniques Utilizing the Vivado™ IP integrator to create a sub-system Performing power analysis and optimization to improve the power efficiency of a design Reviewing and analyzing timing reports for a design

Event Schedule

Virtual Learning Environment (Online)
  • 09.01. - 10.01.2025 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
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Partner

Xilinx
Updated at: 2024-10-31 14:47:02 +0100to the top