Designing with the Zynq UltraScale+ RFSoC
Course Description
This training content is structured to provide designers with an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family. Special emphasis is placed on the Data Converter and Soft-Decision FEC blocks. Power estimation is covered to help designers identify the power demands of the device in various operating modes. Since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device, proper layout and PCB considerations are also covered.
Release Date
January 2021Level
Connectivity 3Training Duration
3 days
Who Should Attend?
Hardware designers interested in understanding the architecture and capabilities of the Zynq UltraScale+ RFSoC data converter and SD-FEC hard blocks.Prerequisites
- _Understanding of the Zynq UltraScale+ MPSoC architecture
- Basic familiarity with data converter terms and principles
- Basic familiarity with forward error correction terms and principles
Course Outline
- RFSoC Overview
- RFSoC ADC Hardware
- RFSoC DAC Hardware
- RFSoC HARDWARE ZCU111
- Data Converter-Design
- Data Converter-Practice
- PCB Design for RFSoC Devices
- RFSoC Soft-Decision FEC
- Designing with the Zynq UltraScale+ RFSoC Full Course Quiz
Topic Descriptions
Event Schedule
No events found. Event request.