Designing with the Zynq UltraScale+ RFSoC

Course Description

This training content is structured to provide designers with an overview of the hard block capabilities for the Zynq® UltraScale+™ RFSoC family. Special emphasis is placed on the Data Converter and Soft-Decision FEC blocks. Power estimation is covered to help designers identify the power demands of the device in various operating modes. Since the Zynq UltraScale+ RFSoC is both a high-speed and an analog and digital device, proper layout and PCB considerations are also covered.

Release Date

January 2021

Level

Connectivity 3

Training Duration

3 days

Who Should Attend?

Hardware designers interested in understanding the architecture and capabilities of the Zynq UltraScale+ RFSoC data converter and SD-FEC hard blocks.

Prerequisites

• _Understanding of the Zynq UltraScale+ MPSoC architecture
• Basic familiarity with data converter terms and principles
• Basic familiarity with forward error correction terms and principles

Course Outline

• RFSoC Overview
• RFSoC ADC Hardware
• RFSoC DAC Hardware
• RFSoC HARDWARE ZCU111
• Data Converter-Design
• Data Converter-Practice
• PCB Design for RFSoC Devices
• RFSoC Soft-Decision FEC
• Designing with the Zynq UltraScale+ RFSoC Full Course Quiz

Topic Descriptions

Zynq UltraScale+ RFSoC Overview – Overview of the Zynq UltraScale+ RFSoC architecture, including brief introductions to RF, data converter solutions, SD-FEC solutions, driver support, and tool support.

RF-ADC – Covers the basics of ADCs. Reviews ADC architecture, functionality, interfaces, configuration, and driver support.

RF-DAC – Covers the basics of DACs. Reviews DAC architecture, functionality, interfaces, configuration, and driver support.

Data Converter Design – Describes common features, the design flow, and utilizing the example design by simulation and implementation.

PCB Design for RFSoC Devices – Describes power requirements, performing power estimation, and utilizing the power design. Analog signal requirements, PCB materials and layer stackup options, and analog trace design are also covered.

Soft-Decision FEC – Covers the basics of forward error correction. Reviews SD-FEC architecture, functionality, interfaces, configuration, and driver support.