Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels
Course Description
This course describes the system design flow and interfaces that can be used for data movements in the Versal™ AI Engine. It also demonstrates how to utilize the advanced MAC intrinsics, AI Engine library for faster development and advanced features in adaptive data flow (ADF) graph implementation, such as using streams, cascade stream, buffer location constraints, run-time parameterization and APIs to update and/read run-time parameters. The emphasis of this course is on:
- Implementing a system-level design flow (PS + PL + AIE) and the supported simulation
- Using an interface for data movement between the PL and AI Engine
- Utilizing advanced MAC intrinsics to implement filters
- Utilizing the AI Engine library for faster development
- Applying advanced features for optimizing a system-level design
Level
Connectivity 3Training Duration
3 days
Who Should Attend?
Software and hardware developers, system architects, and anyone who needs to accelerate their software applications using AMD Xilinx devicesPrerequisites
- Comfort with the C/C++ programming language
- Software development flow
- Vitis software for application acceleration development flow
Skills Gained
After completing this comprehensive training, you will have the necessary skills to:- Implementing a system-level design flow (PS+PL+AIE)and supported simulation
- Using an interface for data movement between the PL and AI Engine
- Describe the data movement between the PS, PL, and AI Engines
- Utilizing advanced MAC intrinsics to implement filters
- Utilizing the AI Engine library for faster development
- Applying advanced features for optimizing a system-level design
Course Outline
- Application Partitioning on Versal Adaptive SoC 1 (Review)
- Application Partitioning on Versal Adaptive SoC 2
- ACAP Data Communications 1
- ACAP Data Communications 2
- System Design Flow
- Introduction to AI Engine APIs for Arithmetic Operations
- Versal AI Engine DSP Library Overview
- Advanced Graph Input Specifications 1
- Advanced Graph Input Specifications 2
- Versal AI Engine Application Debug and Trace
- Designing with Versal AI Engine 2 Full Course Quiz
Event Schedule
so-logic (top1) (Austria)
- 04.12. - 06.12.2024 09:00-17:00 — € 2,400.00 excl. VAT Add to cart