Mitarbeiter

• Geboren: 1968 in Wien
• Kolleg in Nachrichtentechnik
• 1996: Abschluss des Studiums Elektrotechnik an der Technischen Universität Wien (Professoren Paschke, Pötzl, Prechtl, Hoffmann, Mecklenbräuker)
• Während meines Studiums war ich oft Unterrichtsassistent
• Von 1991 bis 1997 unterrichtete ich am Kolleg für Kommunikationstechnik in Wien
• 1997: Zivildienst im AKH (Allgemeines Krankenhaus, eines der größten Krankenhäuser der Welt)
• 1996-2000: Vortragender und Trainier über FPGA-Design an der Technischen Universität Wien
• 1997: Gründung von So-logic GmbH & Co KEG
• Seit 2000 Xilinx-Training-Center für FPGA-Design
• 2003 - 2004: Vortragender und Trainier über FPGA und Computer-Architecture an der Fachhochschule (FH Wien)
• Seit 2008: Vortragender über Embedded Systems an der FH Wiener Neustadt.

Meine Erfahrung sammelte ich in einer der führenden Universiäten von Zentral- und Osteuropa. Neben meiner wissenschaftlichen Arbeiten war ich auch Vortragender an Universitäten und HTLs.

• 1964 born in Vienna
• 1983 successfully graduated College HTL Schellinggasse (1010 Wien) (Communications Engeneering)
• 1984 Alcatel (former ITT) Austria
  • Testing and engineering prototype hardware
  • Assembler an C-language coded Operating system and Debug Software
  • Adoption, development and certification of a digital Telephony system for various countries
  • Hardware development of a complete range of small to large voicemail systems for digital telephony systems which are DSP and X86 based and run a proprietary and linux operating system
• 2000 Tecwings
  • Hardware development of a Multimedia Settop box for MPEG4 video
  • Various developments according to customer specification
  • DC/DC power supply developments
• 2004 so-logic
  • FPGA and PowerPC based redundant hardware design
  • 300A FET based starter relay
  • Ultra compact platform for GSM/GPS tracking
  • 200W DC/DC switching power supply and battery charging
  • High speed FPGA Video transmission

Skills:

• Experience in various Intel Processor platforms (8051, 80x86, Pentium, DSPs), PowerPC, PIC, ATMEL
• Assembly and C-language
• Discrete analog circuit design and Spice based analog simulation
• DC/DC switching applications
• Digital high speed circuit designs and FPGA design
• Circuit design entry, PCB layout (HDI, Starrflex)
• Hardware design simulation, validation and verification
• Systems design, EMC conform development

• Geboren:1953 in Vorarlberg

• Geboren:1967 in Salzburg

• 1975 born in Krems
• 1992 graduation at BFS "aeronautics" in Langenlebarn
• 1997 graduation at HTL "communications engineering" in Vienna
• 1997 Philips Tone testing of fax machines Development of automated test systems
• 1999 Neuroth / Analog Devices Inc.Test hardware development and measurement for HDSL chips, ASIC design and simulation of a G.SHDSL chip
• 2003 On-demand Microelectronics Test hardware development ASIC design of a vector processing (VSP) chip
• 2004 SoLogic FPGA design (Xilinx) for various customers (CPU peripherals, SDI SD/HD video, PCIe, etc.ASIC design of the VSP video (SVEN) chip)

I was born in Novi Sad in 1981.

In 2008 I have graduated from the Faculty of Technical Sciences in Novi Sad, at the department of Microprocessor Electronics. My Master thesis was in the area of embedded system design using FPGAs.

My hobbies are sports and reading.

• 1989 I started studying Electrical Engineering / Computer Technology at the Vienna University of Technology
• 1996 together with a friend we established our own company for professional audio and broadcast engineering
• 2003 the company changed it's focus so I left with all the engineering equipment which since
• 2004 is housed at so-Logic

Currently I'm concentrating on circuit design and PCB layout of complex FPGA based systems

Areas of my expertise:

• High-Speed Design / Signal Integrity, EMC
• FPGA, CPLD Design
• Multilayer, rigid-flex, HDI PCBs
• CAD library development
• Microcontroller / embedded systems
• Analog (audio) design
• Firmware (Assembler, C)
• Mechanical Design (In-House CNC workshop)
• Prototyping & rework

My motto:

Engineering is the art of making what you want from things you can get.

• Geboren: 1999 in Leoben
• 2020: HTL Absolvent; Informationstechnologie,Netzwerktechnik