Staff

Name	Email*	GSM number	Extension**	Activity
Stefan Böckl	sbo1			VHDL
Alfred Bruckner	abr1	+43-664-822 61 77	11	System Designer, Circuit Designer und Layouter
Christian Buchinger	cbu1
Thiago Carneiro	thc1
Herbert Groll	hgr1		86	Embedded linux developer and logic designer
Bernhard Greissing	bgr1	+43-664-82 04 135	30	System designer, circuit designer and layouter
Ramin Hazrati	rha2			Hardware/Software Testing & Verification
Leopold Matzinger	lma1	+43-664-82 10 577	22	Embedded software developer and embedded system designer
Daniela Thorwartl	dth1	+43-664-10 53 069	11	Secretary, training and organisation
Peter Thorwartl	thor	+43-664-41 60 188	11	CEO, trainer and system designer

* Append @so-logic.net
** Call +43-1-315 77 77 plus extension

CEO Peter Thorwartl

Peter Thorwartl was born in Vienna in 1968
Primary School
College for Communication Engineering
Degree in Electrical Engineering
Graduated 1996, Vienna University of Technology - Professors Paschke, Pötzl, Prechtl, Hoffmann, Mecklenbräuker
During his studies teaching assistant at the Vienna University of Technology
From 1991 to 1997 Teacher at the College for Communications Engineering in Vienna
1997 Alternative Service at Allgemeines Krankenhaus Vienna (Austria's largest hospital)
1996 to 2000 lectures about FPGA Design at University of Technology
1997 Foundation of the so-logic GmbH & Co KEG
2000 Xilinx Training Center for FPGA Design
2003 to 2004 lectures about FPGA and Computer Architecture at University of Applied Science in Vienna
2008 lectures about Embedded Systems University of Applied Science in Wiener Neustadt

Iearned my experience at the leading university institute in Central and Eastern Europe. Besides my scientific work he was teaching at the university and technical schools.

Stefan Böckl

Born in Melk in 1989
Stiftsgymnasium Melk until 2004
finished HTL St.Pölten/Electronics/Information Technologies in 2009
Bundesheer Pioniere Melk ET 10/09 until 2010
Hobbies: reading, learning japanese, computer-hardware, hicking, traveling, sports

Alfred Bruckner

1964 in Wien geboren
1983 erfolgreich die HTL Schellinggasse (1010 Wien) absloviert (Fachrichtung Nachrichtentechnik)
1984 Alcatel (former ITT) Österreich
- Testing and engineering prototype hardware
- Assembler an C-language coded Operating system and Debug Software
- Adoption, development and certification of a digital Telephony system for various countries
- Hardware development of a complete range of small to large voicemail systems for digital telephony systems which are DSP and X86 based and run a proprietary and linux operating system
2000 Tecwings
- Hardware development of a Multimedia Settop box for MPEG4 video
- Various developments according to customer specification
- DC/DC power supply developments
2004 so-logic
- FPGA and PowerPC based redundant hardware design
- 300A FET based starter relay
- Ultra compact platform for GSM/GPS tracking
- 200W DC/DC switching power supply and battery charging
- High speed FPGA Video transmission

Skills:

Experience in various Intel Processor platforms (8051, 80x86, Pentium, DSPs), PowerPC, PIC, ATMEL
Assembly and C-language
Discrete analog circuit design and Spice based analog simulation
DC/DC switching applications
Digital high speed circuit designs and FPGA design
Circuit design entry, PCB layout (HDI, Starrflex)
Hardware design simulation, validation and verification
Systems design, EMC conform development

Born in Brazil 1986
Graduated from School of Technology, University of Campinas - UNICAMP - Brazil - 2009
I am currently a first year graduate student at TU (Vienna University of Technology). Master program in Software Engineering.

Undergradute Projects
Network Technologies Publication, Yr II No I 2008. "Frequency Control of Piezoelectric Transducers Operation Using Programmable Logic Devices".
ANDESCON 2008 paper presentation in Cusco, Peru: "A Driver for Piezoelectric Transducers with Automatic Resonance Correction".
International Congress on Ultrasonic's - 2009 at University of Santiago, Chile: "An electronic amplifier for piezoelectric transducers"

Work Experience
Trainee in the Department of Network Management Systems (GRSD) School of Electrical and Computer Engineering (FEEC), UNICAMP Campinas-SP Brazil.

Bernhard Greissing

1989 I started studying Electrical Engineering / Computer Technology at the Vienna University of Technology
1996 together with a friend we established our own company for professional audio and broadcast engineering
2003 the company changed it's focus so I left with all the engineering equipment which since
2004 is housed at so-Logic

Currently I'm concentrating on circuit design and PCB layout of complex FPGA based systems

Areas of my expertise:

High-Speed Design / Signal Integrity, EMC
FPGA, CPLD Design
Multilayer, rigid-flex, HDI PCBs
CAD library development
Microcontroller / embedded systems
Analog (audio) design
Firmware (Assembler, C)
Mechanical Design (In-House CNC workshop)
Prototyping & rework

My motto:

Engineering is the art of making what you want from things you can get.

Herbert Groll

I was born in Mistelbach. I had my first experience with embedded systems with my RTLinux project at the HTL Hollabrunn. Now I'm embedded system designer. I connect the hardware world with the software world. By the way I study electronic engineering at the technical university of Vienna. There I can expand my experience in the areas embedded Linux, embedded design and logic design.

Leopold Matzinger

VHDL, System Designer, company officer with statutory authority

Ramin Hazrati

Born in Iran
Lived and studied in Canada
Education: B.Eng in Systems Engineering from Carleton U. Ottawa/Canada
Experience (SW): Testing & Verification of GSM/(D)AMPS/CDMA base OSS/BSS systems
Experience(HW): Hardware/Software Testing & Verification at so-Logic
Have work in: Austria, Belgium, Canada, Germany, Holland, and the U.S.
Technical interests: FPGA, Analog & Dig ital Electronics
Non-Technical interests: Reading, Photography

Daniela Thorwartl

I was born in Brasil and speak following languages: Portuguese, Italian, English, Spanish, German.

Updated at: 2013-01-03 15:37

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